A MOSFET including silicon carbide is widely used for a semiconductor device having a high withstand voltage and low loss and capable of performing high-speed switching. In particular, regarding a trench-gate type silicon carbide MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), compared with a normal planar type silicon carbide MOSFET, it is possible to greatly improve channel density per unit area and increase an amount of electric current. Therefore, a reduction in ON resistance is expected.
In the trench-gate type silicon carbide MOSFET, in general, on an n-type semiconductor substrate, an epitaxial layer of an n-type semiconductor with low defect density is formed, and a p-type semiconductor layer is formed by an ion injection method. A high-concentration n+ layer connected to a source electrode, and a high-concentration p+ layer connected to the p-type semiconductor layer are formed on the surface of the n-type semiconductor substrate by the ion injection method, and trenches are formed to pierce through the p-type semiconductor layer.
A gate insulating film and a gate electrode material are filled in the trenches. The gate electrode material is etched to form gate electrodes. In a region where trenches cross in the surface direction of the n-type semiconductor substrate, the gate electrode material is not completely filled and a recessed region is formed near the center region. In a process in which the gate electrodes are formed by the etching, side etching and vertical etching equally occur in the recessed region. The side etching advances to the gate electrode material in the trenches adjacent to the regions where the trenches cross. As a result, the area of the gate electrodes decreases, channel density per unit area cannot be increased, and a reduction in ON resistance cannot be performed. The trench-gate type silicon carbide MOSFET has a structure in which the gate electrodes are embedded. Therefore, in some case, the distance between a drain electrode on the rear surface of the MOSFET and the corresponding gate electrode decreases and dielectric breakdown occurs.
As measures against such a problem, there is proposed a structure in which, in the bottom of trenches, insulating films (e.g., SiO2) are formed thicker than the other portions to improve a withstand voltage of gate electrodes (see, Patent Literature 1). There is also proposed a structure in which p-type semiconductor layers are formed in the bottom of trenches instead of the SiO2 and, when a voltage is applied to gate electrodes, depletion layers are formed in the bottom of the trenches to increase a withstand voltage (see, Patent Literature 2).